Standard Parasitic Exchange Format (SPEF)

Table of Contents

SPEF stands for “Standard Parasitic Exchange Format”.It is commonly used file format to represent the parasitic information of a design. Parasitics means the unwanted resistance, capacitance and inductance are formed in the design interconnects (wires and vias).

The SPEF file provides accurate and detailed information about the parasitics and their impact in the design in an ASCII format (human readable).It can be created using parasitic extraction tool (like QRC or StarRC) and not possible to create manually by the user.The SPEF file supports specifications of all the cases like best, worst and typical.

Content in SPEF file:

Header section
Name mapping
Port section
Parasitic information

Header section

In the Header section, here, some basic information about the file available which includes design name, date of creation, vendor name, units of RLC etc.,

Name mapping

This section starts immediately after the hear section with the keyword “*NAME_MAP”. During this section all the nets and instances names are mapped to indices (a unique integer value for each net) preceded by asterisk (*).This mapping done mainly to reduce the complexity and size of the file.

Example:

*NAME_MAP
*1 EAM/mem0[0]
*2 EAM/CTS_1
*3 reset
*854 mcore/net1_test

Port section

This section starts after the Name mapping section with the keyword “*PORTS”. Here, mapped indices are defining their port directions i.e., I (input), O (output), B (Bidirectional).

Example:

*PORTS
*1 B
*3 I
*854 I

In the above example, *1 (EAM/mem0[0]) is defined as B (Bidirectional) which means this is a bidirectional port. Similarly, *3 (reset) is defined as I (input) which means this is an input port. But *2 is not defined to any port because it is just a net.

Internal definition

This is the final section in the SPEF file. Where, each and every net detailed information can be provided separatelyin between “*D_NET” and “END” statements. Let us see an example,

*D_NET *854 0.007958

*CONN
*P *854 I*C 476 470 *L 0.00889
*I *71678:S0 I *C 108 399 *L 0.000688 *D MUXX1

*CAP
1 *854 1.132e-05
2 *4308:D[04] 0.00791875S

*RES
1 *854 *43078:Y 8.85958

*END

In the above example, the detailed information was written for net “*854”. Let us dive into each part:

D_NET

In D_NET section you can observe that “D_NET *854 0.007958”. where, “D_NET” means detailed net then “*854” represents the net and finally “0.007958” this value the total capacitance of this net.

CONN

This CONN gives information about internal or external connection to the net. “*P”indicates that the port is connected to the external and “*I” indicates that the port is connected to the internal.

So, in example you can observe 2 lines, first line started with “*P” and second one started with “*I”. Let us see the syntax [*conn_direction *Net_indexdirection *C XX XX *L XXX *D driving_cell_name].

First line

*P:External connection

*854 I: Net index and “I” represents the input direction of the port;

*C 476 470: It is the co-ordinations of the net

*L 0.00889: It is the capacitance load on the net

Second line

*P: External connection

*71678:S0:Net index

*C 108 399: It is the co-ordinations of the net

*L 0.00068: It is the capacitance load on the net

*D MUXX1: It is the driving cell name

CAP

This part represents number of capacitance elements, node name and capacitance of each node. In the example consider line one“1 *854 1.132e-05”,

1:capacitance element number

*854:capacitance node name

1.132e-05:capacitance of the node

Note: if you have two capacitance values that means coupling capacitance.

RES

This part represents the number of resistances in the net, resistance in between the nodes and resistance value. In the example consider the “1 *854 *43078:Y 8.85958”

1: resistance element number
*854*43078:Y: node1 and node 2
8.85958:resistance in between the node1 and node2

END:The D_NET section ends with the statement “END”

SPEF Example

*SPEF “IEEE 11481 – 1998” //SPEF version
*DESIGN “design_name” //Design name
*DATE “Mon Jan 03 12:16:24 2023” //Timestamp which represents the date and time of file created
*VENDOR “Cadence Design systems, Inc.” //Company of a tool that SPEF generated
*PROGRAM “Innovus” //Tool which generated the SPEF
*VERSION “17.14” //Tool version that generated the SPEF
*DIVIDER /  “/” Specifies the hierarchy
*DELIMITER:  Delimiter between the pin and its instance.
*BUS_DELIMITER [ ] specifies the prefix and suffix used to identify a bit of a bus.
*T_UNIT 1.00 NS // Time in seconds (in this case, nanoseconds)
*C_UNIT 1.000 FF // capacitance units
*R_UNIT 1.000 OHM //resistance units
*L_UNIT 1.000 HENRY //inductance units

*NAME_MAP
*1 EAM/mem0[0]
*2 EAM/CTS_1
*3 reset
*854 mcore/net1_test
*PORTS
*1 B
*3 I
*854 I